• image of 逻辑门阵列的配置结构>EPC2LC20N
  • image of 逻辑门阵列的配置结构>EPC2LC20N
EPC2LC20N
Configuration Proms for FPGAs
Intel
Surface Mount
-
20-LCC (J-Lead)
YES

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image of 逻辑门阵列的配置结构>EPC2LC20N
image of 逻辑门阵列的配置结构>EPC2LC20N
EPC2LC20N
Configuration Proms for FPGAs
Intel
Surface Mount
-
20-LCC (J-Lead)
YES
TYPEDESCRIPTION
Mounting Type Surface Mount
Package / Case 20-LCC (J-Lead)
Surface Mount YES
Operating Temperature 0°C~70°C
Packaging Tube
Series EPC
Published 2014
JESD-609 Code e3
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 20
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Additional Feature IT CAN ALSO OPERATE AT 5V SUPPLY
HTS Code 8542.32.00.51
Voltage - Supply 3V~3.6V 4.75V~5.25V
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 245
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 1.27mm
Reach Compliance Code compliant
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number EPC2
JESD-30 Code S-PQCC-J20
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3/5V
Supply Voltage-Min (Vsup) 3V
Programmable Type In System Programmable
Memory Size 1.6Mb
Operating Mode SYNCHRONOUS
Clock Frequency 12.5MHz
Supply Current-Max 0.05mA
Organization 1695680X1
Memory Width 1
Standby Current-Max 0.0001A
Memory Density 1695680 bit
Parallel/Serial SERIAL
Memory IC Type CONFIGURATION MEMORY
Length 8.9662mm
Height Seated (Max) 4.572mm
Width 8.9662mm
RoHS Status RoHS Compliant
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